One piece of software that nearly every embedded developer must write.
once the prototype hardware is ready, the board's designer would like some reassurance that she has wired the address and data lines correctly, and that the various memory chips are working properly.
And, even if that's not the case,
it is desirable to test any onboard RAM at least as often as the system is
reset. It is up to the embedded software developer, then, to figure out what
can go wrong and design a suite of tests that will uncover problems.
Address Bus
Test
The smallest set of addresses that will cover all possible
combinations is the set of "power-of-two" addresses. These addresses
are analogous to the set of data values used in the walking 1's test. The
corresponding memory locations are 00001h, 00002h, 00004h, 00008h, 00010h,
00020h, etc. In addition, address 00000h must also be tested. The possibility
of overlapping locations makes the address bus test harder to implement. After
writing to one of the addresses, you must check that none of the others has
been overwritten.
Data Bus
Test
A good way to test each bit
independently is to perform the so-called "walking 1's test." Table 1
shows the data patterns used in an 8-bit version of this test. The name of this
test, walking 1's, comes from the fact that a single data bit is set to 1 and
"walked" through the entire data word. The number of data values to
test is the same as the width of the data bus.
00000001
|
00000010
|
00000100
|
00001000
|
00010000
|
00100000
|
01000000
|
10000000
|
Table 1. Consecutive Data Values for the Walking 1's Test
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