DPDK_BTG

* Max ports than can be used. There are 2 port of 10G in the backplane of the BONO board */
#define MAX_PORTS               2

/* Max size of a single packet */
#define MAX_PACKET_SZ           2048

/* Number of mbufs in mempool that is created */
#define NB_MBUF                 8192

/* Number of LPM rules */
#define BTG_CREATE_LPM_MAX_RULES    1024


/*
 * RX and TX Prefetch, Host, and Write-back threshold values should be
 * carefully set for optimal performance. Consult the network
 * controller's datasheet and supporting DPDK documentation for guidance
 * on how these parameters should be set.
 */
#define RX_PTHRESH 8 /**< Default values of RX prefetch threshold reg. */
#define RX_HTHRESH 8 /**< Default values of RX host threshold reg. */
#define RX_WTHRESH 4 /**< Default values of RX write-back threshold reg. */

/*
 * These default values are optimized for use with the Intel(R) 82599 10 GbE
 * Controller and the DPDK ixgbe PMD. Consider using other values for other
 * network controllers and/or network drivers.
 */
#define TX_PTHRESH 36 /**< Default values of TX prefetch threshold reg. */
#define TX_HTHRESH 0  /**< Default values of TX host threshold reg. */
#define TX_WTHRESH 0  /**< Default values of TX write-back threshold reg. */

#define RING_SIZE 1024


CONFIG_RTE_MAX_LCORE=32
CONFIG_RTE_MAX_NUMA_NODES=8
CONFIG_RTE_MAX_MEMSEG=32
CONFIG_RTE_MAX_MEMZONE=512